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Lolita*@新蟲(chóng) (初入文壇)
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[交流]
業(yè)內(nèi)Top3外企-AE崗位招聘-要求學(xué)校背景985/211-坐標(biāo)上海/深圳-可先站內(nèi)私信咨詢
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Job Description: R&D Applications Engineer Location: Shanghai/Shenzhen The Applications Engineer is responsible for working directly with customers, the internal development organization, sales/FAEs and other members of Cadence’s Xtensa Applications Engineering team. In this capacity, it is the direct responsibility of this individual to provide technical support, applications know how and training to use CadenceTensilica’s microprocessor in SoCs. RESPONSIBILITIES: Provide support for Cadence’s Tensilica IP products, specifically hardware flow and verification for SoC implementation. Become an expert and provide guidance on using Tensilica provided scripts for synthesis, place and route and layout. Also guide customers to use verification environment, power analysis scripts for Tensilica processors instand-alone and/or embedded in an SoC. Provide customer training for general Xtensa architecture and tools. Provide quality solutions to customer issues in timely manner. Influence future Xtensa products by providing customer feedback back to the hardware and software development groups. Work closely with Applications Engineering group located in San Jose, CA USA and Pune India to stay up-to-date with the latest tools and architecture. REQUIREMENTS: BS in EE/CS (MS preferred) or equivalent plus 6 to 10 years work experience. In-depth understanding of Computer architecture/ RISC processors/ DSPs. Hands-on experience in DSP processor implementation or verification in SoC. Hands-on experience in synthesis using latest technology libraries. Expert knowledge hardware design basics, Verilog language. Experience in development or testing of any of complex SoC using RISC or DSP processors. Deep knowledge of SoC system architecture, interfaces, and interconnects. Experience in SoC system simulation and verification. Familiar with on-chip bus protocols such as AMBA (AXI, AHB, APB), and on-chip trace and debug (JTAG, CoreSight). Familiarity with JTAG based debugging, chip bring-up will be plus. Knowledge of DSP processors like audio processing, image processing will be plus. Must have good English written and verbal communication skills as well as good problem solving skills. Able to travel occasionally for 2 to 4 weeks per year to International locations. Email：electronics98@126.com [ 來(lái)自版塊群 上海 ] |
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